Method and system for multiplexed transport interface between demodulators (DEMODs) and set-top box (STB) system-on-chips (SoCs)

摘要

A multiplexed transport interface (MTSIF) may be utilized during communication between a demodulation module and a video processing system-on-chip (SoC). The MTSIF may enable concurrent demodulation of a plurality of input modulated video streams, via a plurality of demodulator chips within the demodulation module, by multiplexing data generated by the demodulator chips via the MTSIF during communication between the demodulator module and the video processing SoC. The MTSIF may also be utilized for communicating control signals, which may be used in controlling and/or managing operations of the demodulation module, the video processing SoC, and/or the MTSIF. Communication via the MTSIF may be synchronized. Packets communicated via the MTSIF may be timestamped. Timestamp counters may be used in the demodulation module and the video processing SoC to generate and/or track timestamps in communicated packets. The timestamp counter may be synchronized, using control signals communicated via the MTSIF.

主权项

1. A demodulation device, comprising:
circuitry configured to:
demodulate a plurality of modulated input video data streams into demodulated video data via a plurality of corresponding demodulators;multiplex the demodulated video data generated by the plurality of demodulators;output the multiplexed demodulated video data as packets via a multiplexed transport interface comprising a plurality of interface pins;timestamp the packets using timestamps generated by a first timestamp counter; andoutput at least one timestamp counter synchronization signal via the multiplexed transport interface to synchronize a second timestamp counter with the first timestamp counter, the at least one timestamp counter synchronization signal comprising a timestamp counter increment signal and a timestamp counter reset signal;the timestamp counter increment signal, the timestamp counter reset signal, a serial clock signal, a serial data signal, and a synchronization signal communicated via the plurality of interface pins.