| 主权项 |
1. A method for designing a semiconductor device including a circuit section, a clock path through which a clock is inputted to the circuit section, and a back bias control section which outputs at least a control signal for controlling a back bias of a transistor included in the clock path, the method comprising:
finding, by a processor, a relationship between distance from the back bias control section which controls the back bias of the transistor and an amount of noise which indicates a variation of the back bias, wherein the variation varies according to the distance, in the control signal outputted from the back bias control section; finding, by the processor, an increase of jitter in the clock transmitted on the clock path connected to the circuit section on the basis of the relationship between the distance from the back bias control section and the amount of the noise, the increase of the jitter corresponding to the amount of the noise; and placing, by the processor, the circuit section and the clock path on the basis of the increase of the jitter and an allowable jitter value for the circuit section. |
