Memory device and driving method thereof

摘要

A memory device includes a memory array, an array gap, a voltage provider, and a voltage divider. The voltage provider is disposed in the array gap and coupled to a column of memory cells of the memory array for providing a first voltage to the column of memory cells when a memory cell of the column is selected at a write cycle. The voltage provider is coupled to the voltage provider and the column of memory cells for providing a second voltage lower than the first voltage to the column of memory cells when the memory of the column is half selected at the write cycle.

主权项

1. A memory device comprising:
a memory array comprising:
a plurality of columns of memory cells, each memory cell of the columns of memory cells comprising a plurality of PMOS (P-type metal oxide semiconductor) switches; an array gap; a voltage provider disposed in the array gap coupled to N-wells of PMOS switches of each memory cell of a column of memory cells of the plurality of columns of memory cells for providing a first voltage to the N-wells when a logic level of a bit line coupled to the column of memory cells and a logic level of a bit line bar coupled to the column of memory cells are inverse to one another; and a voltage divider coupled to the voltage provider and the N-wells for dividing the first voltage to provide a second voltage lower than the first voltage to the N-wells when the logic level of the bit line and the logic level of the bit line bar are substantially the same.