发明名称 Triggering performance event capture via pipelined state bundles
摘要 One embodiment of the present invention sets forth a method for analyzing the performance of a graphics processing pipeline. A first workload and a second workload are combined together in a pipeline to generate a combined workload. The first workload is associated with a first instance and the second workload is associated with a second instance. A first and second initial event are generated for the combined workload, indicating that the first and second workloads have begun processing at a first position in the graphics processing pipeline. A first and second final event are generated, indicating that the first and second workloads have finished processing at a second position in the graphics processing pipeline.
申请公布号 US9030480(B2) 申请公布日期 2015.05.12
申请号 US201213719034 申请日期 2012.12.18
申请人 NVIDIA Corporation 发明人 Allen Roger L.;Hakura Ziyad S.;Ogletree Thomas Melvin
分类号 G06F15/80;G06T1/20 主分类号 G06F15/80
代理机构 Artegis Law Group, LLP 代理人 Artegis Law Group, LLP
主权项 1. A method of analyzing the performance of a graphics processing pipeline, the method comprising: combining a first workload and a second workload together in a pipeline to generate a combined workload, wherein the first workload is associated with a first instance, and the second workload is associated with a second instance; generating a first initial event for the combined workload, wherein the first initial event indicates that the first workload has begun processing at a first position in the graphics processing pipeline; generating a first final event for the combined workload, wherein the first final event indicates that the first workload has completed processing at a second position in the graphics processing pipeline; generating a second initial event for the combined workload, wherein the second initial event indicates that the second workload has begun processing at the first position in the graphics processing pipeline; and generating a second final event for the combined workload, wherein the second final event indicates that the second workload has completed processing at the second position in the graphics processing pipeline.
地址 Santa Clara CA US