Semiconductor device comprising a passive component of capacitors and process for fabrication

摘要

A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.

主权项

1. A semiconductor device, comprising:
a wafer having a frontside and a backside and comprising:
at least one integrated circuit chip having an electrical connection frontside,at least one passive component comprising a first conductive plate and a dielectric plate for forming parts of a capacitor, andan encapsulation block in which the integrated circuit chip and the first conductive plate of the passive component are embedded, wherein a frontside of the encapsulation block, the electrical connection frontside of the integrated circuit chip and a frontside of the dielectric plate are coplanar with each other to define the frontside of the wafer; and an electrical connection disposed directly on the frontside of the wafer, wherein the electrical connection comprises a single continuous planar conductive track consisting essentially of a first relatively wider portion disposed directly on the frontside of the dielectric plate to form a second conductive plate of the capacitor and a second relatively narrower portion disposed directly on the frontside of the encapsulation block and the electrical connection frontside of the integrated circuit chip to form a conducting line having an end directly electrically connected to the electrical connection frontside of the integrated circuit chip.