发明名称 Memory device and memory system having programmable refresh methods
摘要 A memory device includes a plurality of memory blocks, a setting circuit configured to set a first mode, in which a first number of memory blocks are refreshed at a time, and a second mode, in which a second number of memory blocks are refreshed at a time, under control of a memory controller, the second number being smaller than the first number, a storage circuit configured to store additional refresh information, and a refresh control unit configured to control the second number of memory blocks to be refreshed at a time whenever a refresh command is applied when the additional refresh information is deactivated, and to control the first number of memory blocks to be refreshed at a time whenever the refresh command is applied when the additional refresh information is activated in a case in which the second mode is set by the setting circuit.
申请公布号 US9030904(B2) 申请公布日期 2015.05.12
申请号 US201213714331 申请日期 2012.12.13
申请人 SK Hynix Inc. 发明人 Lee Yo-Sep
分类号 G11C7/00;G11C11/406;G11C29/02;G11C29/50;G06F1/32 主分类号 G11C7/00
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A memory device comprising: a plurality of memory blocks; a setting circuit configured to set a first mode, in which a first number of memory blocks are refreshed at a time, and a second mode, in which a second number of memory blocks are refreshed at a time, under control of a memory controller, the second number being smaller than the first number; a storage circuit configured to store additional refresh information; and a refresh control unit configured to control the first number of memory blocks to be refreshed when the additional refresh information is activated, and to control the second number of memory blocks to be refreshed when the additional refresh information is deactivated whenever a refresh command is executed in which the second mode is set by the setting circuit, wherein, activation and deactivation of the additional refresh information is determined by a data retention time of the memory device.
地址 Gyeonggi-do KR