| 发明名称 | Control circuit for bit-line sense amplifier and semiconductor memory apparatus having the same, and operating method thereof | ||
| 摘要 | A control circuit for a bit-line sense amplifier may include: a bank active signal generator configured to generate an internal active signal and a bank active signal; and a sense amplifier enable signal generator configured to determine a skew in response to the internal active signal, and set an output time of a sense amplifier enable signal by delaying the bank active signal according to the determined skew. | ||
| 申请公布号 | US9030896(B1) | 申请公布日期 | 2015.05.12 |
| 申请号 | US201414173953 | 申请日期 | 2014.02.06 |
| 申请人 | SK Hynix Inc. | 发明人 | Lee Byeong Cheol |
| 分类号 | G11C7/22;G11C7/12;G11C7/08 | 主分类号 | G11C7/22 |
| 代理机构 | William Park & Associates Ltd. | 代理人 | William Park & Associates Ltd. |
| 主权项 | 1. A control circuit for a bit-line sense amplifier, comprising: a bank active signal generator configured to generate an internal active signal and a bank active signal; and a sense amplifier enable signal generator configured to determine a skew in response to the internal active signal, and set an output time of a sense amplifier enable signal by delaying the bank active signal according to the determined skew. | ||
| 地址 | Gyeonggi-do KR | ||