Hardware-Efficient Signal-Component Separator For Outphasing Power Amplifiers

摘要

Described herein is a fixed-point piece-wise linear (FP PWL) approximation technique for computations of nonlinear functions. The technique results in circuit designs having relatively few and simple arithmetic operations, short arithmetic operands and small-sized look-up tables and the circuits resultant there from can be efficiently pipelined to run at multi-GSamples/s throughputs. In one exemplary embodiment, the FP PWL approximation technique was used in the design of an energy-efficient high-throughput and high-precision signal component separator (SCS) for use with in an asymmetric-multilevel-outphasing (AMO) power amplifier. The FP PWL approximation technique is appropriate for use in any application requiring high-throughput, area and power constrained hardware implementations of nonlinear functions.

主权项

1. A method for designing a circuit which implements a non-linear function, the method comprising:
(a) dividing a non-linear function into a plurality of intervals; (b) for each of the plurality of intervals, obtaining a floating point version of a piece-wise linear (PWL) approximation; (c) for each of the plurality of intervals, obtaining a first fixed point value bi which corresponds to a major part of the function value in that interval; (d) for each of the plurality of intervals, obtaining a second fixed point value corresponding to a compensation value which compensates for a loss of accuracy in representing the nonlinear function in that interval resulting from obtaining the first fixed point value; and (e) for each of the plurality of intervals obtaining a third fixed point value ki corresponding to a slope value in that interval.