发明名称 MINIMIZING THE AMOUNT OF TIME STAMP INFORMATION REPORTED WITH INSTRUMENTATION DATA
摘要 This invention is time stamping subsystem of an electronic apparatus. A time stamp generator generates a multibit time stamp value including a predetermined number of least significant bits overlapping a predetermined number of most significant bits. Each client receives the least significant bits. Each client associates captured data with a corresponding set of the least significant bits in a message. A central scheduling unit associates most significant bits of the time stamp value with the least significant bits of the message. This associating compares overlap bits of the most significant bits and least significant bits. The most significant bits are decremented until the overlap bits are equal.
申请公布号 US2015127997(A1) 申请公布日期 2015.05.07
申请号 US201514597856 申请日期 2015.01.15
申请人 Texas Instruments Incorporated 发明人 Swoboda Gary L.
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人
主权项 1. An integrated circuit comprising: A. first register circuitry having first time stamp bits n to p inputs, the time stamp bits n to p inputs including most significant bits n to m inputs and first overlap bits m−1 to p inputs, the first register circuitry having most significant bits n to m outputs, first overlap bits m−1 to p outputs, and having a decrement input; B. second register circuitry having second time stamp bits m−1 to zero inputs separate from the first time stamp bits n to p inputs, the time stamp bits m−1 to zero inputs including second overlap bits m−1 to p inputs and least significant bits p−1 to zero inputs, the second register circuitry having second overlap bits m−1 to p outputs, and least significant bits p−1 to zero outputs; and C. comparator circuitry having inputs coupled to the first overlap bits m−1 to p outputs and to the second overlap bits m−1 to p inputs, and having a compare output coupled to the decrement input of the first register circuitry.
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