发明名称 METHOD AND GATE STRUCTURE FOR THRESHOLD VOLTAGE MODULATION IN TRANSISTORS
摘要 A method of fabricating a semiconductor device. A substrate (PMOS/NMOS regions) is prepared. A high-k dielectric layer is formed over the substrate. A threshold voltage modulation layer is formed over the dielectric layer of the NMOS region. A first work function layer is formed over the threshold voltage modulation layer and the dielectric layer of the PMOS region. An oxidation suppressing layer is formed over the first work function layer of the NMOS region. A second work function layer is formed over the oxidation suppressing layer and the first work function layer of the PMOS region. A first gate stack including the dielectric layer, the first work function layer and the second work function layer is formed over the PMOS region. A second gate stack including the dielectric layer, the threshold voltage modulation layer, the first work function layer and the oxidation suppressing layer is formed over NMOS region.
申请公布号 US2015123167(A1) 申请公布日期 2015.05.07
申请号 US201414213420 申请日期 2014.03.14
申请人 SK hynix Inc. 发明人 JI Yun-Hyuck;JOO Moon-Sig;JANG Se-Aug;LEE Seung-Mi;KIM Hyung-Chul
分类号 H01L27/092;H01L29/51;H01L21/8238 主分类号 H01L27/092
代理机构 代理人
主权项 1. A method of fabricating a semiconductor device, the method comprising: preparing a substrate including a PMOS region and an NMOS region; forming a high-k dielectric layer over the substrate; forming a threshold voltage modulation layer over the high-k dielectric layer of the NMOS region; forming a first work function layer over the threshold voltage modulation layer and the high-k dielectric layer of the PMOS region; forming an oxidation suppressing layer over the first work function layer of the NMOS region; forming a second work function layer over the oxidation suppressing layer and the first work function layer of the PMOS region; forming, over the PMOS region of the substrate, a first gate stack that includes the high-k dielectric layer, the first work function layer and the second work function layer; and forming, over the NMOS region of the substrate, a second gate stack which includes the high-k dielectric layer, the threshold voltage modulation layer, the first work function layer and the oxidation suppressing layer.
地址 Gyeonggi-do KR