PROGRAMMABLE LOGIC CIRCUIT ARCHITECTURE USING RESISTIVE MEMORY ELEMENTS

摘要

A programmable logic circuit architecture using resistive memory elements. The proposed circuit architecture uses the conventional island-based Field Programmable Gate Array (FPGA) architecture, but with novel integration of CMOS-compatible resistive memory elements that can be programmed efficiently. In the proposed architecture, the programmable interconnects of FPGA are redesigned to use only resistive memory elements and metal wires. Then, the interconnects can be entirely fabricated over logic blocks to save area while keeping their architectural functions unchanged, and the programming transistors can be shared among resistive memory elements to save area. Finally, on-demand buffer insertion is proposed as the buffering solution to achieve more speedup.

主权项

1. An electronic device having a programmable logic circuit architecture, comprising:
a field-programmable gate array (FPGA) comprised of one or more logic blocks (LBs) that provide customizable logic functions, wherein the logic blocks are connected to routing channels through one or more connection blocks (CBs) and the routing channels are connected with each other through one or more switching blocks (SBs); wherein the connection blocks, routing channels, and switching blocks comprise programmable interconnects that are programmed using one or more resistive memory elements.