发明名称 |
METHOD AND SYSTEM FOR TIME INTERLEAVED ANALOG-TO-DIGITAL CONVERTER TIMING MISMATCH ESTIMATION AND COMPENSATION |
摘要 |
Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may comprise receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal. A decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals. A multiplier may be configured to cancel the blocker signal utilizing the determined complex coupling coefficients. |
申请公布号 |
US2015124915(A1) |
申请公布日期 |
2015.05.07 |
申请号 |
US201514590250 |
申请日期 |
2015.01.06 |
申请人 |
Maxlinear, Inc. |
发明人 |
Taluja Pawandeep;Zhu Mingrui;Chen Xuefeng;Anandakumer Anand;Ye Sheng;Gallagher Timothy Leo |
分类号 |
H03M1/06;H04L7/00;H03M1/12;H04L25/08 |
主分类号 |
H03M1/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
Carlsbad CA US |