| 摘要 |
PROBLEM TO BE SOLVED: To provide a signal processing circuit, information processing unit, and signal control method, which reduce occurrence of data anomalies.SOLUTION: An EVEN component selection section 13 acquires a first signal from a DQ signal at every rising edge of a DQS signal and an ODD component selection section 22 acquires a second signal from the DQ signal at every falling edge of the DQS signal. A variable delay imparting section 14 imparts first delay to the first signal based on a phase difference between an internal clock signal and the rising edge of the DQS signal, and a variable delay imparting section 23 imparts second delay to the second signal based on a phase difference between the internal clock signal and the falling edge of the DQS signal. A data acquisition section 15 acquires the first signal delayed by the first delay and a data acquisition section 24 acquires the second signal delayed by the second delay. |
