| 摘要 |
The present invention relates to a semiconductor memory device. More specifically, The present invention relates to: the semiconductor memory device which can stably enter a power saving mode according to a chip selection signal; and a data storage device including the same. The semiconductor memory device includes: a memory cell array; a voltage generator formed to generate voltages to be used for control operation of the cell array; and a control logic which provides a power saving signals for activating or deactivating the voltage generator to the voltage generator according to the chip selection signal provided from an external device. The control logic includes a delay block which delays the chip selection signal and generates the power saving signal based on the delayed chip selection signal. |
