发明名称 SYSTEM AND MEMORY CONTROLLER FOR INTERRUPTIBLE MEMORY REFRESH
摘要 A refresh command is communicated to a memory device to initiate an interruptible refresh which contains multiple segment refreshes separated by interrupt boundaries. A command is communicated to the memory device before execution of a segment refresh and the segment refresh is delayed at an interrupt boundary. Alternatively, a first number of commands in a queue is determined. A first number of segment refreshes to execute is determined based on the first number of commands. The first number of segment refreshes to execute is communicated to the memory device to cause execution of the first number of segment refreshes. A second number of commands in the queue is determined. A second number of segment refreshes to execute is determined based on the second number of commands. The second number of segment refreshes to execute is communicated to the memory device to cause execution of the second number of segment refreshes.
申请公布号 US2015127898(A1) 申请公布日期 2015.05.07
申请号 US201314074117 申请日期 2013.11.07
申请人 International Business Machines Corporation 发明人 Cordero Edgar R.;Fernandez Carlos A.;Henderson Joab D.;Hovis William P.;Sabrowski Jeffrey A.;Saetow Anuwat;Sethuraman Saravanan
分类号 G11C11/406 主分类号 G11C11/406
代理机构 代理人
主权项 1. A method for refreshing a memory device performed by a memory controller, the method comprising: communicating a refresh command to the memory device, the refresh command configured to initiate an interruptible refresh by the memory device, the interruptible refresh comprising a plurality of segment refreshes, the plurality of segment refreshes separated by interrupt boundaries; and communicating a first command to the memory device before execution of a first segment refresh, the first command configured to cause the memory device to execute the first command and delay execution of the first segment refresh at a first interrupt boundary.
地址 Armonk NY US