发明名称 Method and system for functional verification of a circuit description
摘要 A method for functional verification of a circuit description comprises generating a first set of crossover paths based on the circuit description, generating a low power information based on a power design description associated with the circuit description, the low power information determining a set of power state combinations, and generating a second set of crossover paths based on the first set of crossover paths and the low power information, the second set of crossover paths being a subset of the first set of crossover paths. Each of the second set of crossover paths is evaluated to identify circuit description errors, in particular functional circuit description errors.
申请公布号 EP2869224(A1) 申请公布日期 2015.05.06
申请号 EP20130191109 申请日期 2013.10.31
申请人 SYNOPSYS, INC. 发明人 DE, KAUSHIK;NARWADE, MAHANTESH DEVAPPA;MUKHERJEE, RAJARSHI;GUPTA, NAMIT KUMAR
分类号 G06F17/50 主分类号 G06F17/50
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