System and method for fault sensitivity analysis of mixed-signal integrated circuit designs

摘要

An apparatus and method for conducting fault sensitivity analysis of the analog portions of a mixed signal circuit design includes simulating the fault free circuit design, inserting a fault into the analog portion of the circuit design, simulating the circuit design with the fault during a fault interval time period, and determining whether the fault is detectable.

主权项

1. A computer implemented method for conducting fault sensitivity analysis of a mixed signal circuit design having analog portions and digital portions, the method comprising:
receiving a fault free mixed signal circuit design for a mixed signal integrated circuit, a fault, and a fault interval time period; during a single fault sensitivity analysis simulation run, within a simulator:
using a computer, simulating the fault free mixed signal circuit design with a mixed signal circuit simulator from an initial circuit simulation time point until the end of the fault interval time period;freezing a digital kernel of the mixed signal circuit simulator;inserting the fault into an analog portion of the fault free mixed signal circuit design; andusing a computer, simulating the fault free mixed signal circuit design with the fault, using the mixed signal circuit simulator, only from the beginning of the fault interval time period until the end of the fault interval time period; and determining whether the fault is detectable.