Method and device for sending signals between a radio frequency circuit and a baseband circuit

摘要

A method, device and computer program product is provided for sending a data signal and a clock signal between a radio frequency circuit of a device and a baseband circuit of the device, the radio frequency circuit being configured for at least one of transmission and reception of radio signals in a radio frequency band, where the clock signal has a clock frequency Fc. The method comprises selecting the clock frequency Fc to be a rational multiple of the 0.270833 MHz symbol rate of the Global System for Mobile Communications (GSM) standard and a rational multiple of the 3.84 MHz chipping rate of the Wideband Code Division Multiple Access (WCDMA) interface. The clock frequency Fc is selected such that the clock signal can be generated using a 38.4 MHz or 19.2 MHz reference clock signal, a non-fractional Phase Locked Loop clock multiplier and an output divider, without first having to divide down the reference clock signal. The data signal and the clock signal can then be sent between the radio frequency circuit and the baseband circuit using the selected clock frequency Fc.

主权项

1. A method of sending a data signal and a clock signal between a radio frequency circuit of a device and a baseband circuit of the device, the radio frequency circuit being configured for at least one of transmission and reception of radio signals in a radio frequency band, the clock signal having a clock frequency FC, the method comprising:
selecting the clock frequency FC to be a rational multiple of the 0.270833 MHz symbol rate of the Global System for Mobile Communications (GSM) standard and a rational multiple of the 3.84 MHz chipping rate of the Wideband Code Division Multiple Access (WCDMA) interface, wherein the clock frequency FC is selected from an integer multiple of 112.64 MHz or 199.68 MHz such that the clock signal can be generated using a 38.4 MHz or 19.2 MHz reference clock signal, a non-fractional Phase Locked Loop clock multiplier and an output divider, without first having to divide down the reference clock signal; and sending the data signal and the clock signal between the radio frequency circuit and the baseband circuit using the selected clock frequency FC.