| 发明名称 | Erasing method of non-volatile memory device | ||
| 摘要 | A method for erasing a first sub-block of a plurality of sub-blocks included in a block of a non-volatile memory device, wherein the first sub-block includes at least one word line, includes applying an erase voltage to a substrate, applying a third voltage lower than the erase voltage to the word line of the first sub-block, applying a first voltage at least one word line adjacent to the word line of the first sub-block, and applying a second voltage that is the same as or similar to the erase voltage to the other word lines, where the first voltage has a level between the third voltage and the second voltage. | ||
| 申请公布号 | US9025389(B2) | 申请公布日期 | 2015.05.05 |
| 申请号 | US201213606627 | 申请日期 | 2012.09.07 |
| 申请人 | SK Hynix Inc. | 发明人 | Kim Se-Hyun |
| 分类号 | G11C16/16;G11C11/56;G11C16/04;G11C16/14 | 主分类号 | G11C16/16 |
| 代理机构 | IP & T Group LLP | 代理人 | IP & T Group LLP |
| 主权项 | 1. A method for erasing a first sub-block of a plurality of sub-blocks included in a block of a non-volatile memory device, wherein the first sub-block includes at least one word line, comprising: applying an erase voltage to a substrate; applying a third voltage lower than the erase voltage to the at least one word line of the first sub-block; applying a first voltage to at least one adjacent word line adjacent to the at least one word line of the first sub-block; and applying a second voltage that is in the range of approximately 90% to 100% of the erase voltage to other word lines, wherein the first voltage has a level between the third voltage and the second voltage, and the erasing of the first sub-block is performed when the number of erase-program cycles is equal to or greater than a set number. | ||
| 地址 | Gyeonggi-do KR | ||