发明名称 |
Ultrathin body fully depleted silicon-on-insulator integrated circuits and methods for fabricating same |
摘要 |
Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing an ultrathin body (UTB) fully depleted silicon-on-insulator (FDSOI) substrate. A PFET temporary gate structure and an NFET temporary gate structure are formed on the substrate. The method implants ions to form lightly doped active areas around the gate structures. A diffusionless annealing process is performed on the active areas. Further, a compressive strain region is formed around the PFET gate structure and a tensile strain region is formed around the NFET gate structure. |
申请公布号 |
US9023713(B2) |
申请公布日期 |
2015.05.05 |
申请号 |
US201213530449 |
申请日期 |
2012.06.22 |
申请人 |
GLOBALFOUNDRIES, Inc. |
发明人 |
Illgen Ralf;Flachowsky Stefan |
分类号 |
H01L21/00;H01L21/324;H01L21/762;H01L21/84;H01L27/12;H01L29/165;H01L29/66;H01L29/78;H01L29/786;H01L29/51 |
主分类号 |
H01L21/00 |
代理机构 |
Ingrassia Fisher & Lorenz, P.C. |
代理人 |
Ingrassia Fisher & Lorenz, P.C. |
主权项 |
1. A method for fabricating an integrated circuit comprising:
providing an ultrathin body fully depleted silicon-on-insulator substrate; forming a PFET temporary gate structure and an NFET temporary gate structure on the substrate; implanting ions to form lightly doped active areas around the gate structures; performing a diffusionless annealing process on the active areas; forming a compressive strain region around the PFET gate structure by growing a boron-doped silicon germanium (SiGe) layer having a germanium content of about 20% to about 30% and a boron concentration of about 1e20 to about 5e20 ions/cm3; growing a boron-doped germanium-free silicon layer having a boron concentration of about 1e20 to about 5e20 ions/cm3 overlying the boron-doped SiGe layer; and forming a tensile strain region around the NFET gate structure. |
地址 |
Grand Cayman KY |