发明名称 |
Synchronous data system and method for providing phase-aligned output data |
摘要 |
Embodiments of a synchronous data system and method for generating phase-aligned output data are generally described herein. In some embodiments, the synchronous data system includes a plurality of transmitter-receiver (TX-RX) pairs, each associated with a delay-locked loop (DLL) and arranged to generate corresponding output data stream based on a high-speed clock of the associated TX-RX pair. The DLL associated with each TX-RX pair is a phase-shifter DLL that includes an adjustable phase shifter arranged to minimize the phase error between the system clock and the module clock to edge-align the high-speed clocks of each TX-RX pair. |
申请公布号 |
US9025714(B2) |
申请公布日期 |
2015.05.05 |
申请号 |
US201313873720 |
申请日期 |
2013.04.30 |
申请人 |
Raytheon Company |
发明人 |
Lee Jack W.;Yeomans Michael E.;Pichon Carissa L.;Dumais James P. |
分类号 |
H04L7/00;H04B1/26;H04L1/20;H04L7/033 |
主分类号 |
H04L7/00 |
代理机构 |
Schwegman Lundberg & Woessner, P.A. |
代理人 |
Schwegman Lundberg & Woessner, P.A. |
主权项 |
1. A synchronous data system comprising:
a plurality of transmitter-receiver (TX-RX) pairs, each TX-RX pair associated with a delay-locked loop (DLL) and arranged to generate corresponding output data based on a high-speed clock of an associated TX-RX pair, wherein the DLL associated with each TX-RX pair is arranged to synchronize a module clock of the TX-RX pair to a system clock so that the output data of the TX-RX pairs is phase-aligned, and wherein the DLL is a phase-shifter DLL that includes an adjustable phase shifter arranged to minimize a phase error between the system clock and the module clock to edge-align the high-speed clock of each TX-RX pair. |
地址 |
Waltham MA US |