发明名称 Non-volatile programmable switch
摘要 According to one embodiment, a non-volatile programmable switch according to this embodiment includes first and second non-volatile memory transistors, and a common node that is connected to the output side terminals of the first and second non-volatile memory transistors, and a logic transistor unit that is connected to the common node. A length of a gate electrode of the first and second non-volatile memory transistors in a channel longitudinal direction is shorter than a length of the charge storage film in the channel longitudinal direction.
申请公布号 US9025373(B2) 申请公布日期 2015.05.05
申请号 US201313776416 申请日期 2013.02.25
申请人 Kabushiki Kaisha Toshiba 发明人 Tatsumura Kosuke;Zaitsu Koichiro;Matsumoto Mari;Yasuda Shinichi
分类号 G11C11/34;H01L27/088;G11C11/40;H01L21/28;H01L27/118;H01L27/115 主分类号 G11C11/34
代理机构 Patterson & Sheridan, LLP 代理人 Patterson & Sheridan, LLP
主权项 1. A non-volatile programmable switch, comprising: a first non-volatile memory transistor that includes a first input side terminal, a first output side terminal, a first channel between the first input side terminal and the first output side terminal, a first lower part insulating film on the first channel, a first charge storage film on the first lower part insulating film, a first upper part insulating film on the first charge storage film, and a first gate electrode on the first upper part insulating film; a second non-volatile memory transistor that includes a second input side terminal, a second output side terminal, a second channel between the second input side terminal and the second output side terminal, a second lower part insulating film on the second channel, a second charge storage film on the second lower part insulating film, a second upper part insulating film on the second charge storage film, and a second gate electrode on the second upper part insulating film; a first data line that is connected to the first input side terminal; a second data line that is connected to the second input side terminal; a common node that is commonly connected to the first and second output side terminals; and a logic transistor unit that is connected to the common node, wherein a length of the first gate electrode in a channel longitudinal direction is shorter than a length of the first charge storage film in the channel longitudinal direction; a length of the second gate electrode in the channel longitudinal direction is shorter than a length of the second charge storage film in the channel longitudinal direction; a channel width of the first non-volatile memory transistor is greater than a channel length of the first non-volatile memory transistor; and a channel width of the second non-volatile memory transistor is greater than a channel length of the second non-volatile memory transistor.
地址 Tokyo JP