Systems and methods for reducing power at system-on-chip

摘要

A system-on-chip comprises a power-off domain block; and a power-on domain block that analyzes externally transferred data during a power-down state of the power-off domain block, wherein the power-on domain block executes an operation of the power-off domain block or a wake-up operation, based on an analyzed result of the externally transferred data.

主权项

1. A method of managing a system-on-chip, comprising a power-off domain block including a main CPU and a power-on domain block including a low-power CPU and a memory, the method comprising:
transitioning the power-off domain block from a stand-by state to an operating state when the system-on-chip satisfies a power-on condition; and transitioning the power-on domain block from an operating state to a stand-by state, wherein transitioning the power-off domain block from the stand-by state to the operating state when the system-on-chip satisfies the power-on condition comprises: powering the power-off domain block; acquiring information saved in the memory of the power-on domain block for the main CPU of the power-off domain block, by checking an operating state of the low-power CPU; and operating the main CPU, wherein the power-on condition is identified based on a workload of the low-power CPU in response to an analyzing of the externally transferred data.