Demand-paged textures

摘要

A method and system may include a chip having graphics rendering hardware, a cache and a processor to execute an application with texture allocation logic to receive notification of a page miss from the graphics rendering hardware. The logic can map the page miss to a tile of a texture image, store the tile as an entry to the cache, and map the entry to a virtual address space of a virtual image corresponding to the texture image. The system may also include off-chip memory to store the texture image.

主权项

1. A method comprising:
reserving at runtime virtual address space for a virtual image corresponding to a texture image; binding the virtual address space as data a texture sampler reads when rendering, wherein the virtual address space is not backed by physical memory; issuing a texture sampling request for a texel of the virtual image to the texture sampler that makes a read from a portion of the virtual image using a first virtual address of the reserved virtual address space; receiving notification of a page miss in response to the sampler making the read, wherein the first virtual address remains the same during the page miss and is identified as a faulting virtual address by the page miss; mapping the faulting virtual address to a tile in the virtual image in response to the page miss; fetching the tile from a compressed image corresponding to the texture image; decoding the fetched tile based on a decompression algorithm; storing the decoded tile as an entry in a physical memory page of a cache; mapping the entry to the virtual address space for the virtual image to be used in a future texture sampling request, wherein both a second virtual address of the entry of the decoded tile and the first virtual address are usable to refer to the decoded tile; and obtaining a texel by re-issuing the texture sampling request in response to mapping the entry to the virtual address space for the virtual image.