发明名称 Radioactive ray detector card
摘要 A radioactive ray detector card comprises semiconductor elements on a substrate, each having a plurality of first electrodes, provided on one of main surfaces thereof, and a second electrode, provided on other of main surfaces thereof; the substrate having first electrode wirings electrically connected with the plurality of first electrodes, and card edge portions, which transmit signals from the plurality of semiconductor elements to an external electric circuit; the second electrode corresponding to a second electrode identifier, for identifying the semiconductor elements; the first electrodes corresponding to first electrode identifiers, for identifying the plurality of first electrodes, respectively; and the first electrode wirings electrically connect between the first electrodes, corresponding to one of the first electrode identifiers on one semiconductor element of the plurality of semiconductor elements, and the first electrodes, corresponding to one of the same first electrode identifiers on the other semiconductor element.
申请公布号 US9024267(B2) 申请公布日期 2015.05.05
申请号 US201113812303 申请日期 2011.07.28
申请人 Hitachi Consumer Electronics Co., Ltd. 发明人 Kawauchi Hidetaka;Sunaga Yoshinori;Takahashi Isao
分类号 G01T1/24 主分类号 G01T1/24
代理机构 Volpe and Koenig, P.C. 代理人 Volpe and Koenig, P.C.
主权项 1. A radioactive ray detector card comprising a plurality of semiconductor elements on a substrate having at least a first and a second main surface, comprising: each semiconductor element has a plurality of first electrodes, which are provided on a first main surface, and a second electrode, which is provided on the second main surface, wherein a plurality of pixel regions are constructed, each being able to detect radioactive rays, between said plurality of first electrodes and said second electrode, respectively; said substrate has first electrode wiring which is electrically connected with said plurality of first electrodes, and card edge portions, which transmit signals from said plurality of semiconductor elements to an external electric circuit; said second electrode is corresponded to a second electrode identifier, for identifying said semiconductor elements, respectively; said plurality of first electrodes are corresponded to first electrode identifiers, for identifying said plurality of first electrodes, respectively; and said first electrode wiring electrically connecting said first electrodes, which are corresponded to one of said first electrode identifiers on one semiconductor element of said plurality of semiconductor elements, and said first electrodes, which are corresponded to one of said same first electrode identifiers on another semiconductor element; said substrate having an element mounting portion, on which said plurality of semiconductor elements are mounted, including a plurality of element connector portions to be electrically connected with said plurality of first electrodes, respectively, a second electrode side electronic part mounting portion, for mounting thereon second electrode side electronic parts to be electrically connected with said second electrode, and a first electrode side electronic part mounting portion, being provided separating from said second electrode side electronic part mounting portion, for mounting thereon first electrode side electronic parts to be electrically connected with said first electrodes; said first electrode wiring electrically connecting said plurality of element connector portions and said first electrode side electronic parts; and said card edge portions include edge wiring patterns for transmitting the signals from said second electrode side electronic parts and said first electrode side electronic parts to said external electric circuit; said edge wiring patterns include a high-voltage terminal to be applied with high-voltage and a plurality of low-voltage terminals to be applied with voltage lower than that of said high-voltage terminal, and the distance between said high-voltage terminal and said low-voltage terminals is larger than distance between said plurality of low-voltage terminals.
地址 Tokyo JP