发明名称 Method for manufacturing a HEMT transistor and corresponding HEMT transistor
摘要 A method for manufacturing a HEMT transistor includes: realizing an undoped epitaxial layer on a substrate; realizing a barrier epitaxial layer on the undoped epitaxial layer so as to form a heterojunction; realizing source and drain structures, separated from one other, on the barrier epitaxial layer; depositing an insulating layer on the barrier epitaxial layer and on the source and drain structures; and photolithographic defining the insulating layer, defining first and second insulating portions in correspondence of the source and drain structures, respectively, and exposing a portion of the barrier epitaxial layer. The method further comprises: forming first and second spacers lying at the corners of the first and second insulating portions; and depositing a gate metal structure at least partially covering said first and second insulating portions, and said first and second spacers, said gate metal structure being a field plate of the HEMT transistor.
申请公布号 US9024357(B2) 申请公布日期 2015.05.05
申请号 US201213441640 申请日期 2012.04.06
申请人 STMicroelectronics S.r.l. 发明人 Puglisi Valeria;Altamore Corinna;Abagnale Giovanni
分类号 H01L29/778;H01L29/423;H01L29/66;H01L21/336;H01L29/20 主分类号 H01L29/778
代理机构 Seed IP Law Group PLLC 代理人 Seed IP Law Group PLLC
主权项 1. A HEMT transistor, comprising: a heterojunction including a first epitaxial layer and a barrier epitaxial layer; a source structure and a drain structure lying on said barrier epitaxial layer; first and second insulating portions respectively covering the source and drain structures; first and second spacers on said barrier epitaxial layer and between the first and second insulating portions; a dielectric layer at least partially on said first and second insulating portions and said first and second spacers; and a gate metal structure positioned in a contact gate portion between said first and second spacers and at least partially on said first and second insulating portions, said first and second spacers, and the dielectric layer, the dielectric layer being positioned between the spacers and the gate metal structure, said gate metal structure having a shaped profile, and being configured to act as a field plate of said HEMT transistor, wherein said first epitaxial layer comprises an n-type epitaxial layer and a p-type epitaxial layer, said n-type epitaxial layer being in contact with said barrier epitaxial layer.
地址 Agrate Brianza IT