发明名称 RRAM cell with bottom electrode(s) positioned in a semiconductor substrate
摘要 Generally, the subject matter disclosed herein relates to the fabrication of an RRAM cell using CMOS compatible processes. A resistance random access memory device is disclosed which includes a semiconducting substrate, a top electrode, at least one metal silicide bottom electrode formed at least partially in the substrate, wherein at least a portion of the at least one bottom electrode is positioned below the top electrode, and at least one insulating layer positioned between the top electrode and at least a portion of the at least one bottom electrode. A method of making a resistance random access memory device is disclosed that includes forming an isolation structure in a semiconducting substrate to thereby define an enclosed area, performing at least one ion implantation process to implant dopant atoms into the substrate within the enclosed area, after performing the at least one ion implantation process, forming a layer of refractory metal above at least portions of the substrate, and performing at least one heat treatment process to form at least one metal silicide bottom electrode at least partially in the substrate, wherein at least a portion of the at least one bottom electrode is positioned below at least a portion of a top electrode of the device.
申请公布号 US9024286(B2) 申请公布日期 2015.05.05
申请号 US201314087183 申请日期 2013.11.22
申请人 GLOBALFOUNDRIES Singapore PTE Ltd;Nanyang Technological University 发明人 Liu Wenhu;Pey Kin-Leong;Raghavan Nagarajan;Ng Chee Mang
分类号 H01L47/00;H01L45/00;H01L27/24 主分类号 H01L47/00
代理机构 Amerson Law Firm, PLLC 代理人 Amerson Law Firm, PLLC
主权项 1. A resistance random access memory device, comprising: a semiconducting substrate; a metal silicide top electrode positioned above said substrate; a single metal silicide bottom electrode formed at least partially in said substrate, wherein at least a portion of said single bottom electrode is positioned below an entire width of said top electrode; and at least one insulating layer positioned between said top electrode and said single bottom electrode, wherein the at least one layer of insulating material is adapted to breakdown when an operating voltage is applied to said top electrode so as to thereby allow formation of at least one conductive path that extends through said at least one layer of insulating material between said metal silicide top electrode and said single metal silicide bottom electrode.
地址 Singapore SG