发明名称 SEMICONDUCTOR APPRATUS AND TESTING METHOD THEREOF
摘要 A semiconductor device according to the present invention includes a latch memory cell connected with a through-via when a wafer test signal and light enable signal are enabled, saves a signal transmitted through the through-via and prints the saved signal to the through-via when the wafer test signal and a lead enable signal are enabled.
申请公布号 KR20150047292(A) 申请公布日期 2015.05.04
申请号 KR20130127194 申请日期 2013.10.24
申请人 SK HYNIX INC. 发明人 PARK, HEAT BIT
分类号 G11C29/24 主分类号 G11C29/24
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