薄膜电晶体阵列基板;THIN FILM TRANSISTOR ARRAY SUBSTRATE

摘要

本揭露之薄膜电晶体阵列基板包含：含有第一主动层、闸极电极、第一源极电极及第一汲极电极之第一薄膜电晶体；含有第二主动层、浮动闸极电极、控制闸极电极、第二源极电极及第二汲极电极之第二薄膜电晶体；含有第一电极及第二电极之电容器；以及接触第一电极之一部分之覆盖层，且覆盖层与第二电极是在相同层上。制造薄膜电晶体阵列基板之方法也被揭露。; a second TFT including a second active layer, a floating gate electrode, a control gate electrode, a second source electrode and a second drain electrode; a capacitor including a first electrode and a second electrode; and a capping layer contacting a portion of the first electrode, and the capping layer and the second electrode being on a same layer, is disclosed. A method of manufacturing thin film transistor array substrate is also disclosed.