发明名称 TEMPERATURE SENSOR AND RELATED METHOD
摘要 A temperature sensor, including a conduction path, between a line at a supply voltage and a common ground terminal of the temperature sensor, including a capacitor, a resistor and a reverse biased diode a junction temperature of which is to be sensed; a digital circuit coupled with the capacitor, the resistor and the diode, configured to compare a charge voltage of the capacitor with an upper threshold voltage and with a lower threshold voltage, and to generate in operation an output sense signal that switches to a first logic level when the charge voltage attains the lower threshold voltage and to a second logic level when the charge voltage attains the upper threshold voltage, the digital circuit being configured to connect the resistor electrically in parallel with the capacitor to discharge the capacitor when the output sense signal is at the second logic level, and to connect the capacitor so as to be charged by a reverse saturation current flowing throughout the reverse biased diode when the output sense signal is at the first logic level.
申请公布号 US2015117494(A1) 申请公布日期 2015.04.30
申请号 US201314063464 申请日期 2013.10.25
申请人 Caldara Michele 发明人 Caldara Michele
分类号 G01K7/01 主分类号 G01K7/01
代理机构 代理人
主权项 1. A temperature sensor, comprising: a conduction path, between a line at a supply voltage and a common ground terminal of the temperature sensor, including a capacitor, a resistor and a reverse biased diode a junction temperature of which is to be sensed; and a digital circuit coupled with said capacitor, said resistor and said diode, configured to compare a charge voltage of said capacitor with an upper threshold voltage and with a lower threshold voltage, and to generate in operation an output sense signal that switches to a first logic level when said charge voltage attains said lower threshold voltage and to a second logic level when said charge voltage attains said upper threshold voltage, said digital circuit being configured to connect said resistor electrically in parallel with said capacitor to discharge said capacitor when said output sense signal is at said second logic level, and to connect said capacitor so as to be charged by a reverse saturation current flowing throughout said reverse biased diode when said output sense signal is at said first logic level.
地址 Bergamo IT