发明名称 半導体装置のシミュレーション方法
摘要 PROBLEM TO BE SOLVED: To simulate a semiconductor device with a mesh structure while suppressing a simulation error.SOLUTION: A simulation model is set by layering spotted ntype drain regions by kinds of ntype source regions adjoining them, and the number of the layered ntype drain regions is set to a cell size. Then it is considered that there are LDMOSs having different characteristics as many as the number of the layered kinds. Consequently, simulation taking characteristic differences into consideration can be performed, and a simulation error can be suppressed to achieve high-precision simulation.
申请公布号 JP5708508(B2) 申请公布日期 2015.04.30
申请号 JP20120009975 申请日期 2012.01.20
申请人 株式会社デンソー 发明人 小山 芳紀
分类号 H01L21/8234;H01L21/336;H01L27/06;H01L27/088;H01L29/00;H01L29/78 主分类号 H01L21/8234
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