| 摘要 |
<p>PROBLEM TO BE SOLVED: To avoid injection of extra noise during sample period by a simple configuration.SOLUTION: In an inverter INV10 creating an inverted sample clock signal SampleCK' for driving a MOS transistor M2 as a dummy capacitor, by inverting a sample clock signal SampleCK, the inverted sample clock signal SampleCK' is created so that the falling transition time of the inverted sample clock signal SampleCK' is longer than the rising transition time. When dampening the falling of the inverted sample clock signal SampleCK', feed-through noise is reduced by a highpass filter in the downstream.</p> |
