发明名称 METHOD AND APPARATUS FOR DEBUGGING HDL DESIGN CODE AND TEST PROGRAM CODE
摘要 Disclosed is a method of debugging a simulation system including design code representing a design of an electronic circuit and test program code configured to exercise the design code. The method includes using an interactive debugging tool to execute an interactive simulation of the test program code and the design code, and, during the interactive simulation, displaying, using the interactive debugging tool, information of a simulation results file storing a plurality of signal values generated by executing the test program code and the design code during a previously executed simulation.
申请公布号 US2015121346(A1) 申请公布日期 2015.04.30
申请号 US201414527298 申请日期 2014.10.29
申请人 Synopsys, Inc. 发明人 Patel Bindesh;Lin I-Liang;Hsieh Ming-Hui;Tsai Jien-Shen
分类号 G06F11/36 主分类号 G06F11/36
代理机构 代理人
主权项 1. A method of debugging a simulation system comprising design code representing a design of an electronic circuit and test program code configured to exercise the design code, the method comprising: using an interactive debugging tool, executing an interactive simulation of the test program code and the design code; and during the interactive simulation, displaying, using the interactive debugging tool, information of a simulation results file of design code during a previously executed simulation.
地址 Mountain View CA US