DIRECT MEMORY ACCESS CONTROLLER, CONTROL METHOD THEREOF, AND INFORMATION PROCESSING SYSTEM

摘要

Two channels of a main CPU channel and a sub CPU channel each including a reception channel and a transmission channel, and performing a data transfer by a DMA in accordance with a descriptor are provided, a channel switching part selects the main CPU channel or the sub CPU channel in accordance with information set at a mode setting register, and performs a switching of channels at a boundary of a packet to be transferred to thereby enable the switching of channels without interrupting a DMA operation.

主权项

1. A direct memory access controller, comprising:
a first channel which includes a first reception channel and a first transmission channel, and performs a data transfer by a direct memory access in accordance with a descriptor acquired from a first memory; a second channel which includes a second reception channel and a second transmission channel, and performs the data transfer by a direct memory access in accordance with a descriptor acquired from a second memory; a mode setting register; and a channel switching part which selects one channel between the first channel and the second channel in accordance with information set at the mode setting register, detects a boundary of a packet to be transferred, and performs a switching to the selected channel at the detected boundary of the packet.