发明名称 PWMデューティ変換装置
摘要 <p>A PWM duty cycle converter includes a PWM signal generator, a timing signal generator, a limit signal generator, and a duty cycle limiter. The PWM signal generator generates a first PWM signal by comparing a triangular carrier wave with a duty command from a signal source. The timing signal generator generates a timing signal synchronously with at least one of a maximum value and a minimum value of the amplitude of the carrier wave. The limit signal generator generates a limit signal in response to the timing signal. The limit signal sets at least one of an upper limit and a lower limit on a duty cycle of the first PWM signal. The duty cycle limiter combines the first PWM signal and the limit signal to output a second PWM signal having a limited duty cycle.</p>
申请公布号 JP5708605(B2) 申请公布日期 2015.04.30
申请号 JP20120210795 申请日期 2012.09.25
申请人 株式会社デンソー 发明人 千田 康隆
分类号 H03K7/08;H02M3/155;H02M7/48 主分类号 H03K7/08
代理机构 代理人
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