发明名称 BURIED FIELD RING FIELD EFFECT TRANSISTOR (BUF-FET) INTEGRATED WITH CELLS IMPLANTED WITH HOLE SUPPLY PATH
摘要 This invention discloses a semiconductor power device formed in a semiconductor substrate comprises a highly doped region near a top surface of the semiconductor substrate on top of a lightly doped region. The semiconductor power device further comprises a body region, a source region and a gate disposed near the top surface of the semiconductor substrate and a drain disposed at a bottom surface of the semiconductor substrate. Source trenches are opened into the highly doped region filled with a conductive trench filling material in electrical contact with the source region near the top surface. A buried field ring regions is disposed below the source trenches and doped with dopants of opposite conductivity from the highly doped region. In an alternate embodiment, there are doped regions doped with a dopant of a same conductivity type of the buried field ring regions surrounding the sidewalls of the source trenches to function as a charge supply path.
申请公布号 US2015118810(A1) 申请公布日期 2015.04.30
申请号 US201314062319 申请日期 2013.10.24
申请人 Bobde Madhur;Bhalla Anup;Yilmaz Hamza;Guan Lingpeng 发明人 Bobde Madhur;Bhalla Anup;Yilmaz Hamza;Guan Lingpeng
分类号 H01L29/66;H01L21/265;H01L29/40;H01L29/78;H01L29/10 主分类号 H01L29/66
代理机构 代理人
主权项 1. A method for manufacturing a semiconductor power device in a semiconductor substrate comprising: doping the semiconductor substrate to form a lightly doped lower layer and a highly doped upper layer near a top surface on top of the lightly doped lower layer; opening a plurality of source connecting trenches into the highly doped upper layer; implanting buried field ring regions below the source connecting trenches with a dopant of opposite conductivity from the highly doped upper layer; padding the source connecting trenches with a trench insulation layer and filling the source connecting trenches with a conductive trench filling material; and forming a body region, a source region and a gate near the top surface of the semiconductor substrate and forming a source electrode metal layer connecting to the source region and the conducting trench filling material in the source connecting trenches.
地址 Sunnyvale CA US