发明名称 SEMICONDUCTOR DEVICE
摘要 To provide a semiconductor device characterized in that lands for mounting thereon solder balls placed in an inner area of a chip mounting area have an NSMD structure. This means that lands for mounting thereon solder balls placed in an area of the back surface of a through-hole wiring board overlapping with a chip mounting area in a plan view have an NSMD structure. According to the invention, a semiconductor device to be mounted on a mounting substrate with balls has improved reliability.
申请公布号 US2015118801(A1) 申请公布日期 2015.04.30
申请号 US201514590804 申请日期 2015.01.06
申请人 RENESAS ELECTRONICS CORPORATION 发明人 HARADA Kozo;BABA Shinji;WATANABE Masaki;YAMADA Satoshi
分类号 H01L23/00;H01L21/56 主分类号 H01L23/00
代理机构 代理人
主权项 1. A method of manufacturing a semiconductor device comprising: (a) preparing a semiconductor chip having a main surface over which a plurality of protruding electrodes and a wiring board having a first main surface over which a plurality of terminals are formed and a second main surface over which a plurality of lands are formed opposite the first main surface; (b) disposing a sealing resin over the first main surface of the wiring board; and (c) after the step (b), mounting the semiconductor chip over the first main surface of the wiring board via the sealing resin such that the main surface of the semiconductor chip faces to the first main surface of the wiring board and electrically connecting the protruding electrodes of the semiconductor chip to the terminals of the wiring board, respectively, wherein the wiring board comprises: (a1) an insulating film formed over the second main surface; (a2) among the terminals, a plurality of first terminals and a plurality of second terminals placed in a first area of the wiring board; (a3) a plurality of first through-holes placed in a second area inside the first area and electrically coupled to the first terminals, respectively; (a4) among the lands, a plurality of first lands electrically coupled to the first through-holes, respectively, and placed so as to overlap with the second area in plan view; (a5) a plurality of second through-holes placed in a third area outside the first area and electrically coupled to the second terminals, respectively; and (a6) among the lands, a plurality of second lands electrically coupled to the second through-holes, respectively, and placed so as to overlap with the third area in plan view, wherein the insulating film has therein a plurality of openings, wherein the first lands are placed so as to overlap with the semiconductor chip in plan view, and wherein the first lands are embraced in the openings, respectively.
地址 Kawasaki-shi JP