| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory system capable of reducing deterioration in a performance of the memory system by reducing a replacement frequency of an address having a high access frequency in a store-in type memory system. <P>SOLUTION: The memory system according to the present invention includes: a first cache memory 10; a first cache memory 20 to be accessed from a processor in preference to the first cache memory 10; and a replacement section 4 that when cache data is replaced in the first cache memory 10, determines a replacing object cache data using history information representing whether or not each cache data of the cache data stored in the first cache memory 10 has been subjected to replacement in the past, and invalidates the same cache data as the cache data subjected to the replacement, in the cache data stored in the first cache memory 20. <P>COPYRIGHT: (C)2012,JPO&INPIT</p> |
