发明名称 ANALOG-TO-DIGITAL CONVERTER CIRCUIT AND METHOD OF CONTROLLING ANALOG-TO-DIGITAL CONVERTER CIRCUIT
摘要 An analog-to-digital converter circuit includes a plurality of conversion stages that are cascaded to be coupled in series. Each of the plurality of conversion stages includes a signal holding circuit configured to hold an input voltage, an analog-to-digital converter configured to convert the input voltage into a digital signal based on a first reference voltage, a digital-to-analog converter configured to generate a first voltage according to the digital signal, the first reference voltage, and the input voltage, an amplifier configured to amplify the first voltage to generate an output voltage, and a reference holding circuit configured to hold a holding voltage that is in proportion to the first reference voltage. The amplifier is coupled to the reference holding circuit to receive and amplify the holding voltage to generate a second reference voltage.
申请公布号 US2015116140(A1) 申请公布日期 2015.04.30
申请号 US201414527327 申请日期 2014.10.29
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 IDE Tatsuya
分类号 H03M1/06;H03M1/44;H03M1/12 主分类号 H03M1/06
代理机构 代理人
主权项 1. An analog-to-digital converter circuit comprising: a plurality of conversion stages that are cascaded to be coupled in series, each of the plurality of conversion stages including a signal holding circuit configured to hold an input voltage;an analog-to-digital converter configured to convert the input voltage into a digital signal based on a first reference voltage;a digital-to-analog converter configured to generate a first voltage according to the digital signal, the first reference voltage, and the input voltage;an amplifier configured to amplify the first voltage to generate an output voltage; anda reference holding circuit configured to hold a holding voltage that is in proportion to the first reference voltage, the amplifier being coupled to the reference holding circuit to receive and amplify the holding voltage to generate a second reference voltage.
地址 Yokohama-shi JP