MICROELECTRONIC PACKAGES HAVING LAYERED INTERCONNECT STRUCTURES AND METHODS FOR THE MANUFACTURE THEREOF

摘要

Microelectronic packages having layered interconnect structures are provided, as are methods for the fabrication thereof. In one embodiment, the method includes forming a first plurality of interconnect lines in ohmic contact with a first bond pad row provided on a semiconductor. A dielectric layer is deposited over the first plurality of interconnect lines, the first bond pad row, and a second bond pad row adjacent the first bond pad row. A trench via is then formed in the dielectric layer to expose at least the second bond pad row therethrough. A second plurality of interconnect lines is formed in ohmic contact with the second bond pad row within the trench via. The second plurality of interconnect lines extends over the first bond pad row and is electrically isolated therefrom by the dielectric layer to produce at least a portion of the layered interconnect structure.

主权项

1. A method for fabricating a microelectronic package comprising:
forming a first plurality of interconnect lines in ohmic contact with a first bond pad row disposed on a semiconductor die; depositing a dielectric layer over the first plurality of interconnect lines, the first bond pad row, and a second bond pad row disposed on the semiconductor die adjacent the first bond pad row; creating a trench via exposing at least the second bond pad row through the dielectric layer; and forming a second plurality of interconnect lines in ohmic contact with the second bond pad row within the trench via, the second plurality of interconnect lines extending over the first bond pad row and electrically isolated therefrom by the dielectric layer to at least partially produce a layered interconnect structure.