发明名称 TECHNIQUE FOR CONTROLLING POSITIONS OF STACKED DIES
摘要 <p>An assembly component (100) and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies (310-1 - 310-N) that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terrace (112-1) at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component (100). In particular, the assembly component may include a pair of stepped terraces (112-1,112-2) that approximately mirror the stepped terrace of the chip package and which provide vertical position references for an assembly tool that positions the set of semiconductor dies in the vertical stack during assembly of the chip package.</p>
申请公布号 WO2015060978(A1) 申请公布日期 2015.04.30
申请号 WO2014US57237 申请日期 2014.09.24
申请人 ORACLE INTERNATIONAL CORPORATION 发明人 DAYRINGER, MICHAEL, H., S.;HOPKINS, R., DAVID;CHOW, ALEX
分类号 H01L25/065;H01L21/98 主分类号 H01L25/065
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