| 摘要 |
<p>A semiconductor memory apparatus includes a resistive memory cell configured to be applied with a command voltage pulse with a different voltage level, depending upon an input command, and a feedback unit coupled between one end and the other end of the resistive memory cell, and configured to detect whether an amount of current which passes through the resistive memory cell reaches a target level and selectively form a pull-down current path for limiting an amount of current which the resistive memory cell passes, wherein the feedback unit controls the target level according to the command voltage pulse.</p> |
