Read training a memory controller

摘要

Provided are a device and computer readable storage medium for programming a memory module to initiate a training mode in which the memory module transmits continuous bit patterns on a side band lane of the bus interface; receiving the bit patterns over the bus interface; determining from the received bit patterns a transition of values in the bit pattern to determine a data eye between the determined transitions of the values; and determining a setting to control a phase interpolator to generate interpolated signals used to sample data within the determined data eye.

主权项

1. A device comprising:
a bus interface to at least one memory module; memory controller logic that when operates performs operations, the operations comprising:
programming the memory module to initiate a training mode in which the memory module transmits continuous bit patterns on a side band lane of the bus interface;receiving the bit patterns over the bus interface;determining from the received bit patterns a transition of values in the bit pattern to determine a data eye between the determined transitions of the values; anddetermining a setting to control a phase interpolator to generate interpolated signals used to sample data within the determined data eye.