主权项 |
1. A packaged chip comprising:
a lead frame having a plurality of sections of conductive material, the plurality of sections including at least one floating section that does not abut against an edge of the lead frame, each section of the lead frame having a plurality of edges; at least one chip mounted on a section of the lead frame; wherein the section includes an edge having a solder flow impeding feature located thereon, the solder flow impeding feature including an integral portion of the section of the lead frame that extends in a first projection outward at an edge of the section and parallel to an external surface of the section, wherein an internal surface of the first projection is co-planar with an internal surface of a main portion of the section, the solder flow impeding feature also including a second projection that extends from an external side of the first projection in a direction generally perpendicular to the first projection, wherein a surface of the second projection that faces the same direction as the external surface of the section is disposed inward of the external surface of the section, wherein the solder flow impeding feature forms a general hook shape, wherein a pocket of the hook shape is disposed toward the external surface of the section. |