Area-efficient physically unclonable function circuit architecture

摘要

Generating a physically a physically unclonable function (“PUF”) circuit value includes comparing each of first identification components in a first bank to each of second identification components in a second bank. A given first identification component in the first bank is not compared to another first identification component in the first bank and a given second identification component in the second bank is not compared to another second identification component in the second bank. A digital bit value is generated for each comparison made while comparing each of the first identification components to each of the second identification components. A PUF circuit value is generated from the digital bit values from each comparison made.

主权项

1. A method of generating a physically unclonable function (“PUF”) circuit value comprising:
comparing each of first identification components in a first bank to each of second identification components in a second bank, wherein a given first identification component in the first bank is not compared to another first identification component in the first bank, and wherein a given second identification component in the second bank is not compared to another second identification component in the second bank each of the first identification components including a first capacitor and each of the second identification components including a second capacitor; generating a digital bit value for each comparison made while comparing each of the first identification components to each of the second identification components; and generating a PUF circuit value from the digital bit values generated from each comparison made, wherein comparing each of the first identification components to each of the second identification components includes:
unbalancing charge on the first capacitor and the second capacitor;rebalancing the charge on the first capacitor and the second capacitor, after unbalancing the charge; andgenerating an output voltage representative of a difference between the first capacitor and the second capacitor, wherein generating the digital bit value includes comparing the output voltage to a reference voltage.