Vertical oxide-oxide interface for forming-free, low power and low variability RRAM devices

摘要

Forming a resistive switching layer having a vertical interface can generate defects confined along the interface between two electrodes. The confined defects can form a pre-determined region for filament formation and dissolution, leading to low power resistive switching and low program voltage or current variability. In addition, the filament forming process of the resistive memory device can be omitted due to the existence of the confined defects.

主权项

1. A method for forming a resistive switching memory structure, the method comprising:
providing a substrate; forming a first and a second electrode above the substrate; forming a dielectric layer between the first and second electrodes, wherein the dielectric layer comprises a first portion and a second portion, wherein the first and second portions comprise a same metal oxide material, wherein the first portion directly contacts both the first electrode and the second electrode, wherein the second portion directly contacts both the first electrode and the second electrode, and wherein the first portion directly contacts the second portion, wherein the dielectric layer is operable as a resistive switching layer.