Plural differential pair employing FinFET structure

摘要

A plural differential pair may include a first semiconductor fin having first and second drain areas. First and second body areas may be disposed on the fin between the first and second drain areas. A source area may be disposed on the fin between the first and second body areas. The plural differential pair may include a first pair of fin field effect (FinFET) transistors and a second pair of FinFET transistors. The plural differential pair may include first and second top fin areas projecting from respective portions of a top side of the first and second body areas of the fin. The first and second top fin areas may each have a width that is wider than the first and second body areas of the fin.

主权项

1. A method for making a plural differential pair comprising:
forming a first semiconductor fin having first and second drain areas, first and second body areas disposed between the first and second drain areas, and a source area disposed between the first and second body areas, the fin having first and second sides that are substantially perpendicular to a substrate, and a top side between the first and second sides, the top side being substantially parallel to the substrate and located opposite a side of the fin in contact with the substrate; forming a first pair of fin field effect (FinFET) transistors, the first pair including a first FinFET having a first gate electrode adjacent to the first body area, and a second FinFET having a second gate electrode adjacent to the second body area; forming a second pair of FinFET transistors, the second pair including a third FinFET having a third gate electrode adjacent to the first body area, and a fourth FinFET having a fourth gate electrode adjacent to the second body area; and forming a first top fin area and a second top fin area projecting from respective portions of the top side of the first and second body areas of the fin, wherein the width of the first and second top fin areas increase from being the width of the respective first and second body areas at a base of the first and second top fin areas to being wider than the width of the first and second body areas at a top of the first and second top fin areas, wherein the forming the first top fin area and the second top fin area projecting from respective portions of the top side of the first and second body areas of the fin comprises:
etching the gate electrodes of the first pair of FinFET transistors and the second pair for FinFET transistors to a height that is less than the height of the respective first body area and second body area;exposing the top of the first and second body areas;epitaxially growing the first top fin area and the second top fin area from the tops of the respective first body area and second body area; andplanarizing the first top fin area and the second top fin area so that the width of the first and second top fin areas increase from being the width of the respective first and second body areas at a base of the first and second top fin areas to being wider than the width of the first and second body areas at a top of the first and second top fin areas.