| 摘要 |
<p>A semiconductor circuit is disclosed. The semiconductor circuit comprises: a master stage for receiving a first data and a first clock and outputting a second data; and a slave stage for receiving the second data and a second clock different from the first clock and outputting a third data; wherein the master stage includes: a first circuit formed between a first voltage and a first node for changing the second data to a first level, and a second circuit formed between the first node and a second voltage for changing the second data to a second level, wherein the second circuit functions according to a logic calculation signal from the first data and the first clock.</p> |
