| 摘要 |
This invention provides a semiconductor device that makes it possible to reduce the penalty associated with ensuring reliability. To that end, said semiconductor device is provided with a latch circuit that has three or more independent I/O paths. Said latch circuit is provided with a plurality of storage elements (STE1 through STE3) that are provided on the respective I/O paths and store inputted data, synchronized on a clock signal. At least one of said storage elements (for example, STE1) is provided with a majority-decision unit (for example, 81a) that performs a majority decision using data from storage elements provided on I/O paths other than the I/O path on which that storage element is provided. Said storage element outputs data that reflects the result of that majority decision. |
