COST EFFECTIVE METHOD OF FORMING EMBEDDED DRAM CAPACITOR

摘要

A high capacitance embedded metal interconnect capacitor and associated fabrication processes are disclosed for using a directional barrier metal formation sequence in a dual damascene copper process to form multi-layer stacked copper interconnect structure having reduced barrier metal layer formation at the bottom of each via hole so that the multi- layer stacked copper interconnect structure may be readily removed and replaced with high capacitance MIM capacitor layers.